Asus E7702 Bedienungsanleitung

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dg_toe10gip_instruction_xilinx_en.doc
10-Nov-14 Page 1
TOE10G-IP Demo Instruction
Rev1.1 10-Nov-14
This document describes the instruction to run TOE10G-IP for transferring 10-Gb data between
FPGA development board and PC through 10Gigabit Ethernet. This demo can select to run with
supported and unsupported Jumbo frame PC.
1 Environment Setup
As shown in Figure 1 -Figure 3, to run TOE10G-IP standard demo, please prepare
1) FPGA Development board (KC705/VC707/ZC706)
2) PC with 10Gigabit Ethernet support or 10Gigabit Ethernet card
3) 10 Gigabit SFP+ Copper Cable (DAC) or 2x10-Gigabit SFP+ Transceiver with Optical
cable for network connection between FPGA Development board and PC
4) micro USB cable for programming FPGA between FPGA Development board and PC
5) “send_tcp_client_10G.exe” and “recv_tcp_client_10G.exe”, provided by Design Gateway,
which are test application available on PC
Figure 1 TOE10G-IP Demo Environment Setup on KC705
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Inhaltsverzeichnis

Seite 1 - TOE10G-IP Demo Instruction

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 1 TOE10G-IP Demo Instruction Rev1.1 10-Nov-14 This document describes the instruction to r

Seite 2

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 10 - Connect micro USB cable from FPGA development board to PC, and connect power

Seite 3 - 2 Demo description

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 11 - Press StartSW at Center-SW as shown in Figure 1 - Figure 3 to initialize parameter in s

Seite 4

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 12 4.1 Run Sending Demo Sending demo will operate in loop and user needs to cancel the appli

Seite 5 - 3 PC Setup

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 13 4.1.2 Jumbo frame mode - Set DIPSW[2] = OFF to run Sending demo. - Set DIPSW[1] = ON an

Seite 6

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 14 4.2 Run Receiving Demo 4.2.1 Performance test mode - Set DIPSW[2] = ON to run Receiving

Seite 7

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 15 4.2.2 Verification mode - Set DIPSW[2] = ON to run Receiving demo. - Set DIPSW[3] = ON

Seite 8

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 16 5 Revision History Revision Date Description 1.0 05-Sep-14 Initial version release

Seite 9 - 4 How to run demo

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 2 Figure 2 TOE10G-IP Demo Environment Setup on VC707 Figure 3 TOE10G-IP Demo Environment Se

Seite 10

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 3 2 Demo description There are two test modes, i.e. sending mode and receiving mo

Seite 11

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 4 2.1 Sending mode In this mode, 32 GB data will be transferred from FPGA developmen

Seite 12

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 5 3 PC Setup Before running demo, user needs to setup network setting on PC as follows. 3.

Seite 13

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 6 3.2 Speed and Frame Setting Figure 5 Network Configure - On Local Area Connection Prop

Seite 14

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 7 Figure 6 Link speed and Jumbo frame setup - On Advanced Tab, select “Jumbo Packet” and t

Seite 15

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 8 Figure 7 Performance Options - On Advanced Tab, select “Performance Options” and click “

Seite 16 - 5 Revision History

dg_toe10gip_instruction_xilinx_en.doc 10-Nov-14 Page 9 4 How to run demo Both Sending and Receiving demo requires same steps to set up hardware

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